The present invention relates to a semiconductor device having a silicon semiconductor structure formed on an insulation substrate and a method for manufacturing the same.
High integration of MOS type semiconductor devices has progressed recently to develop a MOS LSI having extremely minute semiconductor elements which are 2 .mu.m in minimum dimension. Particularly, a MOS LSI memory having such large scale memory capacity as 16K-bit and 64k-bit has been developed and practiced. It has recently become common in view of high integration and low power consumption that one memory cell is formed as an enhancement transisotr-resistor type (E/R type) structure in which high resistance elements are used as load elements, instead of a 6-transistor structure in which one memory cell is formed by six MOS transistors. FIG. 1 shows a circuit diagram of a memory cell of E/R type. The memory cell includes enhancement type drive MOS transistors 2 and 4 whose sources are grounded, load resistors 6 and 8 connected respectively between a power supply terminal V.sub.D and drains of MOS transistors 2, 4, an enhancement type transfer MOS transistor 10, with one end of the current path of which is connected to the drain of MOS transistor 2 and to the gate of MOS transistor 4, and an enhancement type transfer MOS transistor 12, with one end of the current path of which is connected to the gate of MOS transistor 2 and to the drain of MOS transistor 4. The other ends of the current paths of MOS transistors 10 and 12 are connected to bit lines BL1 and BL2, respectively while their gates are both connected to a word line WL.
Load resistors 6 and 8 usually employed in the E/R type memory cell are formed from polycrystalline silicon so as to have high resistance values ranging from 1 M.OMEGA. to 100 m.OMEGA.. When resistance elements having such high resistance values are made of polycrystalline silicon, some problems are caused in that the resistance value of such resistance elements varies depending on the crystallographic property of the polycrystalline silicon (such as the radius of crystal particles) and depending on the difference of growth condition. Moreover, the formation of ohmic contact between high resistance polycrystalline silicon regions and conductive regions is difficult. Ohmic contact can be attained by making high the impurity concentration in a region adjacent to contacted areas. However, impurities in the high impurity concentration region abnormally diffuse (along the boundaries of the crystal particles, for example) into a low impurity concentration region, thus causing the resistance value of the high resistance region to be lowered.
There has been considered another memory cell of 4-transistor-2-diode type in which diodes 14 and 16 are used as load elements, as shown in FIG. 2, instead of load resistors 6 and 8. In order to set the reverse resistance value of diodes 14 and 16 to a several tens M.OMEGA. or more, it is necessary that the reverse current density of these diodes be set over several nA/.mu.m. However, it is difficult to gain such property from these diodes using the usual silicon substrate. In addition, diodes formed using a silicon substrate need a larger area as compared with load resistors formed of polycrystalline silicon.